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Weed 2011 logo

Workshop on Energy-Efficient Design

( WEED 2011 )

Held in conjunction with the 2011 International Symposium on Computer Architecture (ISCA-38)

June 5, 2011
San Jose, California

ISCA 2011 logo


Previous Offerings: 2010, 2009




The 3rd Workshop on Energy Efficient Design was conducted successfully at San Jose on the 5th of June, 2010. It was well attended with a good mix of researchers and practitioners from industry and academia.

Below is the final program of WEED 2011. Clicking on the titles below would take you to the presentations where available.

Additional information on the conference can be found in the Call for Papers for WEED 2011.

Sunday, June 5, 2011



Welcome Address


Session 1: Memory Systems



EASE: Energy-Aware Self-Optimizing DRAM (pdf)

..... Janani Mukundan and Jose  Martinez (Cornell University)

Energy Aware Memory Management through Database Buffer Control (pdf)
..... Chang S Bae (Northwestern Universty) and Tayeb Jamel (Intel)


Session 2: Interconnects




Reducing Power and Area by Interconnecting Memory Controllers to Memory Ranks with RF Coplanar Waveguides on the Same Package (pdf)
..... Mario D. U. Marion and Kevin Skadron (University of Virginia)

Time-based Snoop Filtering in Chip Multiprocessors (pdf)
..... Iman Faraji (Amirkabir University of Technology, Iran) and Amirali Baniasadi (University of Victoria, Canada)

CCNoC: On-Chip Interconnects for Cache-Coherent Manycore Server Chips (pdf)
..... Ciprian Seiculescu, Stavros Volos, Naser Khosro Pour, Babak Falsafi, Giovanni De Micheli (EPFL, Switzerland)


Open-mike Discussion: Green Computing Challenges



Session 3: Datacenter




Power Provisioning for Diverse Datacenter Workloads (pdf)
..... Christopher Stewart and Jing Li (Ohio State University)

Exploring the Potential of CMP Core Count Management on Data Center Energy Savings (pdf)
..... Ozlem Bilgir (Princeton University), Margaret Martonosi (Princeton University) and Qiang Wu (Facebook)


Session 4: Technology and Systems




Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Stages (pdf)                       

..... Timothy N. Miller, Renji Thomas and Radu Teodorescu (Ohio State University)



The Seventh Cell of a Six-Cell Battery (pdf)

..... Delyan Raychev (Wayne State University), Youhuizi Li (Wayne State University) and Weisong Shi (Tongji University, China)


An Energy Efficient Datapath for Asymmetric Cryptography (pdf)

..... Andrew Targhetta and Paul Gratz (Texas A&M University)





Workshop Co-Organizers
John Carter, IBM
Karthick Rajamani, IBM

Program Committee:
Murali Annavaram, University of Southern California
Pradip Bose, IBM
David Brooks, Harvard
John Carter, IBM, Co-chair
Jichuan Chang, Hewlett-Packard
Trishul Chilimbi, Microsoft
Xiaobo Fan, Google
Sudhanva Gurumurthi, University of Virginia
Benjamin Lee, Duke University
Tao Li, University of Florida
Karthick Rajamani, IBM, Co-chair
Vijay Reddi, AMD
Karsten Schwan, Georgia Tech
Xiaorui Wang, University of Tennessee
Thomas Wenisch, University of Michigan


Additional Reviewers:

Liqun Cheng

Marisabel Guevara

Mark Hennecke

Michael Lyons

David Meisner

Steven Pelley

Seng Oon Toh

Weidan Wu