Workshop on Energy-Efficient Design 2009

                   June 20, 2009

                        Austin, Texas

 

Continental breakfast                                                                                                  8:00-8:30

Welcome and Introduction                                                                                         8:30-8:45

Datacenter power modeling and management                                                     8:45-9:45

§         Lakshmi Ganesh, Jie Liu, Suman Nath, Galen Reeves and Feng Zhao. Unleash Stranded Power in Data Centers with RackPacker

§         Steven Pelley, David Meisner, Thomas Wenisch and Jim VanGilder. Understanding and Abstracting Total Data Center Power

§         Group discussion/survey on energy-efficiency issues in the datacenter.

Server architecture and management (Invited Talk)                                   9:45-10:15

§         Hillery Hunter.  Memory Quicksand: Unexpected Factors in Main Memory Power Management

Break                                                                                                                           10:15-10:30

Server architecture and management                                                                  10:30-12:00

§         Anshul Gandhi, Mor Harchol-Balter, Rajarshi Das, Charles Lefurgy and Jeffrey Kephart. Power Capping Via Forced Idleness

§         Vlasia Anagnostopoulou, Susmit Biswas, Alan Savage, Ricardo Bianchini, Tao Yang and Frederic T. Chong. Energy Conservation in Datacenters through Cluster Memory Management and Barely-Alive Memory Servers

§         Madhu Saravana Sibi Govindan, Charles Lefurgy and Ajay Dholakia. Using on-line power modeling for server power capping

§         Group discussion/survey on server design and management issues

Break for Lunch                                                                                                         12:00-14:00

VLSI and Microarchitecture                                                                                    14:00-15:30

§         Timothy Miller, Nagarjuna Surapaneni, Radu Teodorescu and Joanne Degroat. Flexible Redundancy in Robust Processor Architecture

§         John Sartori and Rakesh Kumar. Characterizing Voltage-scaling Limitations of Razor-based Designs

§         Ronald Dreslinski, Michael Wieckowski, David Blaauw, Dennis Sylvester and Trevor Mudge. Near Threshold Computing

§         Group discussion/survey on VLSI and Microarchitecture design efficiency issues

Break                                                                                                                            15:30-15:45

Panel Session: Where are the weeds in energy-efficiency?                          15:45-17:15

Panelists: Ricardo Bianchini* (Rutgers), Eugene Gorbatov* (Intel), Tom Keller (IBM),
                 Margaret Martonosi (Princeton), Trevor Mudge (Michigan), San Nassif (
IBM),
                 Roger Tipley (HP), John Carter (
IBM – moderator)



* Tentative