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Workshop on Asynchrony in the PGAS Programming Model |
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June 8, 2009 Collocated with ICS 2009 The new golden era of concurrency offers a diversity of concurrent architectures to the application programmer -- clusters of symmetric multiprocessors, heterogeneous accelerators (such as the Cell, GPGPUs), large core-count integrated machines (such as the Blue Gene), and multiple levels of parallelism (multithreaded multicores, such the newer Power architectures, or distributed multiprocessors like the Cray MTA). The central programming challenge for these new architectures is to develop a suitable and robust programming model. The Partitioned Global Address Space (PGAS) model has attracted considerable attention as such a programming model, particularly in the High Performance Computing space. However, widespread acceptance and extension to newer paradigms (e.g. to heteregeneous accelerators and irregular application domains) has been hampered by a focus on homogoneous execution contexts and the Single Program Multiple Data (SPMD) threading model. Several research groups have recently started to investigate asynchronous execution in the PGAS model. Asynchronous execution is the foundation for active message programming, and fine-grained concurrency (e.g. Cilk-style fork-join, OpenMP style teams). It is also the basis for data transfer between non-coherent memories (DMA), remote atomic operations, and in general for techniques for overlapping computation and communication. Finally, asynchronous execution offers a simple model for spawning massive multi-threaded kernel computations on accelerators such as GPUs. Authors are invited to submit a 10 page paper for consideration for the workshop. We invite papers on all aspects of the PGAS programming model, with particular emphasis on handling asynchronous (multi-threaded) execution (topics enumerated below). Important dates
Early conference registration ends on May 10, 2009. Paper submission here. Final papers will be hosted on this website. Organizing Committee
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